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843081agi-01 www.icst.com/products/hiperclocks.html rev. b january 23, 2006 1 integrated circuit systems, inc. ICS843081I-01 f emto c locks ? c rystal - to - 3.3v, 2.5v lvpecl c lock m ultiplier g eneral d escription the ICS843081I-01 is an ethernet clock multiplier and a member of the hiperclocks tm family of high performance devices from ics. the ICS843081I-01 accepts a crystal reference of 19.6mhz - 28mhz. the ICS843081I-01 has excellent 1ps or lower phase jitter performance, over the 1.875mhz - 20mhz integration range. the ICS843081I-01 is packaged in a small 8-pin tssop, making it ideal for use in systems with limited board space. f eatures ? one differential lvpecl output ? one crystal oscillator interface: 19.6mhz - 28mhz ? output frequency range: 490mhz - 700mhz ? vco range: 490mhz - 700mhz ? rms phase jitter @ 625mhz using a 25mhz reference (1.875mhz - 20mhz): 0.32ps (typical) ? 3.3v or 2.5v operating supply ? -40c to 85c ambient operating temperature ? available in both standard and lead-free rohs compliant packages hiperclocks? ic s ICS843081I-01 8-lead tssop 4.40mm x 3.0mm x 0.925mm package body g package top view v cca xtal_out xtal_in v ee 1 2 3 4 v cc q nq oe 8 7 6 5 vco 490 - 700 mhz phase detector m = 25 (fixed) oe xtal_in xtal_out q nq b lock d iagram p in a ssignment f requency e xample f unction t able t u p n i ) r e i l p i t l u m ( n / m) z h m ( s e i c n e u q e r f t u p t u o ) z h m ( l a t x 0 25 20 0 5 5 25 25 2 6 8 25 20 0 7
843081agi-01 www.icst.com/products/hiperclocks.html rev. b january 23, 2006 2 integrated circuit systems, inc. ICS843081I-01 f emto c locks ? c rystal - to - 3.3v, 2.5v lvpecl c lock m ultiplier t able 2. p in c haracteristics t able 1. p in d escriptions l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u c n i e c n a t i c a p a c t u p n i 4f p r p u l l u p r o t s i s e r p u l l u p t u p n i 1 5k r e b m u ne m a ne p y tn o i t p i r c s e d 1v a c c r e w o p. n i p y l p p u s g o l a n a , 2 3 , t u o _ l a t x n i _ l a t x t u p n i , t u p n i e h t s i n i _ l a t x . e c a f r e t n i r o t a l l i c s o l a t s y r c . t u p t u o e h t s i t u o _ l a t x 4v e e r e w o p. n i p y l p p u s e v i t a g e n 5e ot u p n ip u l l u p . d e l b a n e s i t u p t u o q , h g i h n e h w . n i p e l b a n e t u p t u o . s l e v e l e c a f r e t n i l t t v l / s o m c v l . e t a t s z i h o t q s e c r o f , w o l n e h w 7 , 6q , q nt u p t u o. s l e v e l e c a f r e t n i l c e p v l . s t u p t u o k c o l c l a i t n e r e f f i d 8v c c r e w o p. n i p y l p p u s e r o c : e t o n p u l l u p . s e u l a v l a c i p y t r o f , s c i t s i r e t c a r a h c n i p , 2 e l b a t e e s . s r o t s i s e r t u p n i l a n r e t n i o t s r e f e r
843081agi-01 www.icst.com/products/hiperclocks.html rev. b january 23, 2006 3 integrated circuit systems, inc. ICS843081I-01 f emto c locks ? c rystal - to - 3.3v, 2.5v lvpecl c lock m ultiplier t able 3a. p ower s upply dc c haracteristics , v cc = v cca = 3.3v 5%, t a = -40c to 85c a bsolute m aximum r atings supply voltage, v cc 4.6v inputs, v i -0.5v to v cc + 0.5v outputs, i o continuous current 50ma surge current 100ma package thermal impedance, ja 101.7c/w (0 mps) storage temperature, t stg -65c to 150c note: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these ratings are stress specifications only. functional operation of product at these conditions or any conditions be- yond those listed in the dc characteristics or ac character- istics is not implied. exposure to absolute maximum rating conditions for extended periods may affect product reliability. t able 3c. lvcmos/lvttl dc c haracteristics , v cc = v cca = 3.3v 5% or 2.5v 5%, t a = -40c to 85c t able 3b. p ower s upply dc c haracteristics , v cc = v cca = 2.5v 5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v c c e g a t l o v y l p p u s e r o c 5 3 1 . 33 . 35 6 4 . 3v v a c c e g a t l o v y l p p u s g o l a n a 5 3 1 . 33 . 35 6 4 . 3v i c c t n e r r u c y l p p u s r e w o p 2 7a m i a c c t n e r r u c y l p p u s g o l a n a 2 1a m i e e t n e r r u c y l p p u s r e w o p 8 7a m l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v c c e g a t l o v y l p p u s e r o c 5 7 3 . 25 . 25 2 6 . 2v v a c c e g a t l o v y l p p u s g o l a n a 5 7 3 . 25 . 25 2 6 . 2v i c c t n e r r u c y l p p u s r e w o p 0 6a m i a c c t n e r r u c y l p p u s g o l a n a 2 1a m i e e t n e r r u c y l p p u s r e w o p 3 7a m l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h i e g a t l o v h g i h t u p n i v c c v 3 . 3 =2v c c 3 . 0 +v v c c v 5 . 2 =7 . 1v c c 3 . 0 +v v l i e g a t l o v w o l t u p n i v c c v 3 . 3 =3 . 0 -8 . 0v v c c v 5 . 2 =3 . 0 -7 . 0v i h i t n e r r u c h g i h t u p n iv c c v = n i v 5 2 6 . 2 r o v 5 6 4 . 3 =5a i l i t n e r r u c w o l t u p n iv c c v , v 5 2 6 . 2 r o v 5 6 4 . 3 = n i v 0 =0 5 1 -a
843081agi-01 www.icst.com/products/hiperclocks.html rev. b january 23, 2006 4 integrated circuit systems, inc. ICS843081I-01 f emto c locks ? c rystal - to - 3.3v, 2.5v lvpecl c lock m ultiplier t able 5a. ac c haracteristics , v cc = v cca = 3.3v 5%, t a = -40c to 85c t able 5b. ac c haracteristics , v cc = v cca = 2.5v 5%, t a = -40c to 85c t able 3d. lvpecl dc c haracteristics , v cc = v cca = 3.3v 5% or 2.5v 5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h o 1 e t o n ; e g a t l o v h g i h t u p t u ov c c 4 . 1 -v c c 9 . 0 -v v l o 1 e t o n ; e g a t l o v w o l t u p t u ov c c 0 . 2 -v c c 7 . 1 -v v g n i w s g n i w s e g a t l o v t u p t u o k a e p - o t - k a e p6 . 00 . 1v 0 5 h t i w d e t a n i m r e t s t u p t u o : 1 e t o n v o t c c . v 2 - t able 4. c rystal c haracteristics l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o y c n e u q e r f t u p t u o 0 9 40 0 7z h m t ) ? ( t i j ; ) m o d n a r ( r e t t i j e s a h p s m r 1 e t o n : e g n a r n o i t a r g e t n i @ z h m 5 2 6 z h m 0 2 - z h m 5 7 8 . 1 2 3 . 0s p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 25 2 10 0 6s p c d oe l c y c y t u d t u p t u oz h m 5 2 = l a t x5 45 5% . n o i t c e s s i h t g n i w o l l o f t o l p e s i o n e s a h p e h t o t r e f e r e s a e l p : 1 e t o n l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o y c n e u q e r f t u p t u o 0 9 40 0 7z h m t ) ? ( t i j ; ) m o d n a r ( r e t t i j e s a h p s m r 1 e t o n : e g n a r n o i t a r g e t n i @ z h m 5 2 6 z h m 0 2 - z h m 5 7 8 . 1 9 3 . 0s p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 25 2 10 5 6s p c d oe l c y c y t u d t u p t u oz h m 5 2 = l a t x5 45 5% . n o i t c e s s i h t g n i w o l l o f t o l p e s i o n e s a h p e h t o t r e f e r e s a e l p : 1 e t o n r e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u n o i t a l l i c s o f o e d o m l a t n e m a d n u f y c n e u q e r f 6 . 9 18 2z h m ) r s e ( e c n a t s i s e r s e i r e s t n e l a v i u q e 0 5 e c n a t i c a p a c t n u h s 7f p l e v e l e v i r d 1w m
843081agi-01 www.icst.com/products/hiperclocks.html rev. b january 23, 2006 5 integrated circuit systems, inc. ICS843081I-01 f emto c locks ? c rystal - to - 3.3v, 2.5v lvpecl c lock m ultiplier t ypical p hase n oise at 625mh z @ 3.3v 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 200 625mhz rms phase jitter (random) 1.875mhz to 20mhz = 0.32ps (typical) o ffset f requency (h z ) n oise p ower dbc hz ? ? ? 625mhz rms phase jitter (random) 1.875mhz to 20mhz = 0.39ps (typical) o ffset f requency (h z ) n oise p ower dbc hz 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 200 t ypical p hase n oise at 625mh z @ 2.5v 10 100 1k 10k 100k 1m 10m 100m 10 100 1k 10k 100k 1m 10m 100m phase noise result by adding a gb ethernet filter to raw data raw phase noise data gb ethernet filter ? ? ? phase noise result by adding a gb ethernet filter to raw data raw phase noise data gb ethernet filter
843081agi-01 www.icst.com/products/hiperclocks.html rev. b january 23, 2006 6 integrated circuit systems, inc. ICS843081I-01 f emto c locks ? c rystal - to - 3.3v, 2.5v lvpecl c lock m ultiplier p arameter m easurement i nformation o utput d uty c ycle /p ulse w idth /p eriod o utput r ise /f all t ime 3.3v o utput l oad ac t est c ircuit scope qx nqx lvpecl 2v -1.3v 0.165v clock outputs 20% 80% 80% 20% t r t f v sw i n g t pw t period t pw t period odc = x 100% q nq v ee v cc , v cca 2.5v o utput l oad ac t est c ircuit phase noise mas k offset frequency f 1 f 2 phase noise plot rms jitter = area under the masked phase noise plot noise power rms p hase j itter scope qx nqx lvpecl 2v -0.5v 0.125v v ee v cc , v cca
843081agi-01 www.icst.com/products/hiperclocks.html rev. b january 23, 2006 7 integrated circuit systems, inc. ICS843081I-01 f emto c locks ? c rystal - to - 3.3v, 2.5v lvpecl c lock m ultiplier a pplication i nformation as in any high speed analog circuitry, the power supply pins are vulnerable to random noise. the ICS843081I-01 provides separate power supplies to isolate any high switching noise from the outputs to the internal pll. v cc and v cca should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. to achieve optimum jitter performance, power supply isolation is required. figure 1 illustrates how a 10 resistor along with a 10 f and a .01 f bypass capacitor should be connected to each v cca pin. the 10 resistor can also be replaced by a ferrite bead. p ower s upply f iltering t echniques f igure 1. p ower s upply f iltering 10 v cca 10 f .01 f 3.3v or 2.5v .01 f v cc figure 2. c rystal i npu t i nterface c rystal i nput i nterface the ICS843081I-01 has been characterized with 18pf parallel resonant crystals. the capacitor values, c1 and c2, shown in figure 2 below were determined using an 18pf parallel reso- nant crystal and were chosen to minimize the ppm error. the optimum c1 and c2 values can be slightly adjusted for different board layouts. ICS843081I-01 c1 33p x1 18pf parallel crystal c2 22p xtal_out xtal_in
843081agi-01 www.icst.com/products/hiperclocks.html rev. b january 23, 2006 8 integrated circuit systems, inc. ICS843081I-01 f emto c locks ? c rystal - to - 3.3v, 2.5v lvpecl c lock m ultiplier t ermination for 3.3v lvpecl o utput the clock layout topology shown below is a typical termina- tion for lvpecl outputs. the two different layouts mentioned are recommended only as guidelines. fout and nfout are low impedance follower outputs that generate ecl/lvpecl compatible outputs. therefore, termi- nating resistors (dc current path to ground) or current sources must be used for functionality. these outputs are designed f igure 3b. lvpecl o utput t ermination f igure 3a. lvpecl o utput t ermination to drive 50 transmission lines. matched impedance tech- niques should be used to maximize operating frequency and minimize signal distortion. figures 3a and 3b show two dif- ferent layouts which are recommended only as guidelines. other suitable clock layouts may exist and it would be rec- ommended that the board designers simulate to guarantee compatibility across all printed circuit and clock component process variations. v cc - 2v 50 50 rtt z o = 50 z o = 50 fout fin rtt = z o 1 ((v oh + v ol ) / (v cc ? 2)) ? 2 3.3v 125 125 84 84 z o = 50 z o = 50 fout fin
843081agi-01 www.icst.com/products/hiperclocks.html rev. b january 23, 2006 9 integrated circuit systems, inc. ICS843081I-01 f emto c locks ? c rystal - to - 3.3v, 2.5v lvpecl c lock m ultiplier t ermination for 2.5v lvpecl o utput figure 4a and figure 4b show examples of termination for 2.5v lvpecl driver. these terminations are equivalent to terminat- ing 50 to v cc - 2v. for v cc = 2.5v, the v cc - 2v is very close to ground level. the r3 in figure 4b can be eliminated and the termination is shown in figure 4c. f igure 4c. 2.5v lvpecl t ermination e xample f igure 4b. 2.5v lvpecl d river t ermination e xample f igure 4a. 2.5v lvpecl d river t ermination e xample r2 62.5 zo = 50 ohm r1 250 + - 2.5v 2,5v lvpecl driv er r4 62.5 r3 250 zo = 50 ohm 2.5v vcc=2.5v r1 50 r3 18 zo = 50 ohm zo = 50 ohm + - 2,5v lvpecl driv er vcc=2.5v 2.5v r2 50 2,5v lvpecl driv er vcc=2.5v r1 50 r2 50 2.5v zo = 50 ohm zo = 50 ohm + -
843081agi-01 www.icst.com/products/hiperclocks.html rev. b january 23, 2006 10 integrated circuit systems, inc. ICS843081I-01 f emto c locks ? c rystal - to - 3.3v, 2.5v lvpecl c lock m ultiplier p ower c onsiderations this section provides information on power dissipation and junction temperature for the ICS843081I-01. equations and example calculations are also provided. 1. power dissipation. the total power dissipation for the ICS843081I-01 is the sum of the core power plus the power dissipated in the load(s). the following is the power dissipation for v cc = 3.3v + 5% = 3.465v, which gives worst case results. note: please refer to section 3 for details on calculating power dissipated in the load. ? power (core) max = v cc_max * i ee_typ = 3.465v * 78ma = 270.27mw ? power (outputs) max = 30mw/loaded output pair total power _max (3.465v, with all outputs switching) = 270.27mw + 30mw = 300.27mw 2. junction temperature. junction temperature, tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. the maximum recommended junction temperature for hiperclocks tm devices is 125c. the equation for tj is as follows: tj = ja * pd_total + t a tj = junction temperature ja = junction-to-ambient thermal resistance pd_total = total device power dissipation (example calculation is in section 1 above) t a = ambient temperature in order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance ja must be used. assuming a moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 90.5c/w per table 6 below. therefore, tj for an ambient temperature of 85c with all outputs switching is: 85c + 0.300w * 90.5c/w = 112c. this is below the limit of 125c. this calculation is only an example. tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow , and the type of board (single layer or multi-layer). t able 6. t hermal r esistance ja for 8- pin tssop, f orced c onvection ja by velocity (meters per second) 0 1 2.5 multi-layer pcb, jedec standard test boards 101.7c/w 90.5c/w 89.8c/w
843081agi-01 www.icst.com/products/hiperclocks.html rev. b january 23, 2006 11 integrated circuit systems, inc. ICS843081I-01 f emto c locks ? c rystal - to - 3.3v, 2.5v lvpecl c lock m ultiplier 3. calculations and equations. the purpose of this section is to derive the power dissipated into the load. lvpecl output driver circuit and termination are shown in figure 5. t o calculate worst case power dissipation into the load, use the following equations which assume a 50 load, and a termination voltage of v cc - 2v. ? for logic high, v out = v oh_max = v cc_max ? 0.9v (v cco_max - v oh_max ) = 0.9v ? for logic low, v out = v ol_max = v cc_max ? 1.7v (v cco_max - v ol_max ) = 1.7v pd_h is power dissipation when the output drives high. pd_l is the power dissipation when the output drives low. pd_h = [(v oh_max ? (v cc_max - 2v))/r l ] * (v cc_max - v oh_max ) = [(2v - (v cc _max - v oh_max )) /r l ] * (v cc_max - v oh_max ) = [(2v - 0.9v)/50 ] * 0.9v = 19.8mw pd_l = [(v ol_max ? (v cc_max - 2v))/r l ] * (v cc_max - v ol_max ) = [(2v - (v cc _max - v ol_max )) /r l ] * (v cc_max - v ol_max ) = [(2v - 1.7v)/50 ] * 1.7v = 10.2mw total power dissipation per output pair = pd_h + pd_l = 30mw f igure 5. lvpecl d river c ircuit and t ermination q1 v out v cc rl 50 v cc - 2v
843081agi-01 www.icst.com/products/hiperclocks.html rev. b january 23, 2006 12 integrated circuit systems, inc. ICS843081I-01 f emto c locks ? c rystal - to - 3.3v, 2.5v lvpecl c lock m ultiplier r eliability i nformation t ransistor c ount the transistor count for ICS843081I-01 is: 1697 t able 7. ja vs . a ir f low t able for 8 l ead tssop ja by velocity (meters per second) 0 1 2.5 multi-layer pcb, jedec standard test boards 101.7c/w 90.5c/w 89.8c/w
843081agi-01 www.icst.com/products/hiperclocks.html rev. b january 23, 2006 13 integrated circuit systems, inc. ICS843081I-01 f emto c locks ? c rystal - to - 3.3v, 2.5v lvpecl c lock m ultiplier p ackage o utline - g s uffix for 8 l ead tssop t able 8. p ackage d imensions reference document: jedec publication 95, mo-153 l o b m y s s r e t e m i l l i m m u m i n i mm u m i x a m n8 a- -0 2 . 1 1 a5 0 . 05 1 . 0 2 a0 8 . 05 0 . 1 b9 1 . 00 3 . 0 c9 0 . 00 2 . 0 d0 9 . 20 1 . 3 ec i s a b 0 4 . 6 1 e0 3 . 40 5 . 4 ec i s a b 5 6 . 0 l5 4 . 05 7 . 0 0 8 a a a- -0 1 . 0
843081agi-01 www.icst.com/products/hiperclocks.html rev. b january 23, 2006 14 integrated circuit systems, inc. ICS843081I-01 f emto c locks ? c rystal - to - 3.3v, 2.5v lvpecl c lock m ultiplier t able 9. o rdering i nformation while the information presented herein has been checked for both accuracy and reliability, integrated circuit systems, incorpor ated (ics) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. no other circuits, patent s, or licenses are implied. this product is intended for use in normal commercial and industrial applications. any other applications such as those requiring high reliability or other extr aordinary environmental requirements are not recommended without additional processing by ics. ics reserves the right to change any circuitry or specifications without noti ce. ics does not authorize or warrant any ics product for use in life support devices or critical medical instruments. the aforementioned trademarks, hiperclocks and femtoclocks are trademarks of integrated circuit systems, inc. or its subsidiari es in the united states and/or other countries. r e b m u n r e d r o / t r a pg n i k r a me g a k c a pg n i g a k c a p g n i p p i h se r u t a r e p m e t 1 0 - i g a 1 8 0 3 4 8 s c i1 0 i a 1p o s s t d a e l 8e b u tc 5 8 o t c 0 4 - t 1 0 - i g a 1 8 0 3 4 8 s c i1 0 i a 1p o s s t d a e l 8l e e r & e p a t 0 0 5 2c 5 8 o t c 0 4 - f l 1 0 - i g a 1 8 0 3 4 8 s c il 1 0 i ap o s s t " e e r f - d a e l " d a e l 8e b u tc 5 8 o t c 0 4 - t f l 1 0 - i g a 1 8 0 3 4 8 s c il 1 0 i ap o s s t " e e r f - d a e l " d a e l 8l e e r & e p a t 0 0 5 2c 5 8 o t c 0 4 - . t n a i l p m o c s h o r e r a d n a n o i t a r u g i f n o c e e r f - b p e h t e r a r e b m u n t r a p e h t o t x i f f u s " f l " n a h t i w d e r e d r o e r a t a h t s t r a p : e t o n
843081agi-01 www.icst.com/products/hiperclocks.html rev. b january 23, 2006 15 integrated circuit systems, inc. ICS843081I-01 f emto c locks ? c rystal - to - 3.3v, 2.5v lvpecl c lock m ultiplier t e e h s y r o t s i h n o i s i v e r v e re l b a te g a pe g n a h c f o n o i t p i r c s e de t a d b a 5 t b 5 t 9 t 1 4 4 5 4 1 . e u l a v r e t t i j e s a h p s m r d e t c e r r o c - n o i t c e s s e r u t a e f l a c i p y t s p 6 2 . 0 m o r f r e t t i j e s a h p s m r d e g n a h c - e l b a t s c i t s i r e t c a r a h c c a v 3 . 3 . l a c i p y t s p 2 3 . 0 o t l a c i p y t s p 7 2 . 0 m o r f r e t t i j e s a h p s m r d e g n a h c - e l b a t s c i t s i r e t c a r a h c c a v 5 . 2 . l a c i p y t s p 9 3 . 0 o t . s t o l p e s i o n e s a h p l a c i p y t d e t a d p u . g n i k r a m e e r f - d a e l d e d d a - e l b a t n o i t a m r o f n i g n i r e d r o 6 0 / 3 2 / 1

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